We've been hearing a lot about SMT with the EV8 and P4 Xeon, so I thought I'd inagurate the first technical post about it....

I think Alpha said they can implement SMT on the EV8 with only a 10% overhead in die area...what changes need to be implemented in the datapath and control to enable SMT? I imagine you would need more PC registers and a larger register file, but what else? More execution units? A wider-issue decoder?

Also, would an SMT processor take advantage of the same multithreaded code designed for SMP machines?