I dont' know a heck of a lot about the hammer family...then again, few people do, and those that do have NDA's . Sure there's the x86-64 documentation, but that's implementation agnostic.

Some more points about the whole bandwidth thing: sure you can add more layers to the PCB, but can't you do that anyway with SDR/DDR if you added additional channels?

I'm not arguing that SDR/DDR is better, I'm just saying that I don't think Intel wanted to simply add more layers, due to cost issues. While the P4 as a chip is cheap compared to other processor introductions of the past from Intel, it's still not cheap compared to AMD (god bless competition ).

Plus, having to install RIMM's in units of 4 eliminates the ability of the consumer to do much serious upgrading - in order to upgrade, they'd have to buy 4 RIMM's of the same type! Common', though I know the vast majority of corporate users don't do that, some do, and that'd be a major pain/expense. Especially if there were only 4 RIMM slots - you'd have to throw them all out! Otherwise, you could have 8 RIMM slots, but that just takes up a lot of space, increasing the size of the board - would Intel really want to do that?