Post your comments on the article entitled: "Why Intel Is Twofaced"

Article: http://www.systemlogic.net/articles/01/1/intel


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i think what cpu company's should do is stop making extra instuctions that people have to support before the cpu accually becomes useful. when the should be making the hardware better...

the accual power of the cpu is more important then what instuctions it supports (eg. iSSE/2,3Dnow!) it would have the widest support then.

spell checker

cont.


why do do you think the athlon,t-bird,duron is doing so well agains t the p3,celeron1/2.

they improved the hardware alot,fpu is the most talked about part though. there "new" hardware did cause some incompatibility, and it did run alot hotter then the p3 (5-15*C more) and not the widest mainboard support. but most people don't care because it faster for the money you spend on it... most user care about getting the most "bang for the buck" not about the little drawbacks...

once the p4 gets going and lowers the price it'll do great unless amd can top it (i personally don't think it can if intel solves "like price and high "ping"" memory)



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From what I've heard from an assembler programmer on the net (the most reliable of all sources of course), is that there are some steps backwards in terms of chip design.

I can't remember a whole lot about the article, but The Register had posted a link to it. It was some emulator page :\


I am hesitant about how 'stripped' the P4 is. I would've preferred at least the L3 cache, and the L1 is a tad small IMO (although it is really low latency). But with misses being more damaging than previous chip designs (long pipeline), some extra cache wouldn't hurt...wouldn't it?? (I admit I'm not entirely in the know, plus for some reason I'm friggin' tired right now.....)

You're referring to http://www.emulators.com/pentium4.htm

I admit that I read it, but I will also say that I wrote most of this article independant of reading that one (I wrote most of it before reading his article).

I agree with much of what he said, though as I am not an assembly guru, I can't say much about some of his points.

Some of the "steps backwards" are just fundamental realizations of attaining high clock speeds. The author failed to mention that the latency of instructions has been increasing since pipelining was introduced. In many, many cases, pipelining actually increases the length of the instruction, but it allows higher clock rate, and more throughput (real-world throughput is the ultimate determination of performance).

The author also failed to mention that the Pentium 4 will scale FAR more than the Pentium 3 ever did in the same process. That is one the points of my article. 1ghz is basically the top for the Pentium 3 in .18 micron technology. In .18 micron technology, the 1.5ghz Pentium 4 is about that of an equally equipped (in terms of bandwidth) Pentium 3 1ghz system in terms of performance. We've already said that 1ghz is the "end of the line" for the Pentium 3 in .18 tech (maybe intel will eek out that 1.13, but who knows). Then Pentium 4 will ramp to MUCH HIGHER than where it is now IN THE SAME PROCESS. So right now, lets be realistic. It is about as fast as a 1ghz on average. But while the Pentium 3 is at a dead end, the Pentium 4 will keep on increasing in clock rate, and ultimately, in performance.

I wonder just how did whoever wrote this article determine all his information?
1. Is he an engineer at Intel, and is willing to blow the whistle on the lack of performance of the processors, I doubt it.

2. Is he an engieer at Rambus, and is saying why rambus suck, and saying why intel sucks, to push the blame off rambus. I doubt it too.

3. Does he actually own an Itanium system, and can responsibly conclude the lack of performance of an Itanium?

Its funny how much AMD worshipping goes around in the community (not that Intel worshipping doesn't exist), but articles like these are pretty vague, and really the only people who I would believe, would be either a reputable engineer at a large semiconductor firm, that either competes, or deals with Intel. Until someone like that comes around, articles like these are pretty much total BS. From benchmarks done, DDR SDRAM for the AMD Athlon T-Birds, offer only 10% performance improvement, and thats being hailed as a godsend. The KT133A's 266mhz bus w/ PC133 gives a 4-5% speed improvement. Therefore DDR SDRAM is pretty insignificant, yet its seen as a godsend, which is BS.
Articles like these makes the PC community look pretty pathetic to outsiders.

doh, premature post.

[This message has been edited by Paul (edited 01-10-2001).]

For starters, please read the note at the beginning of the article. The title has two meanings. One positive towards intel (the reasons WHY they SEEM twofaced), and negative (what MAKES them twofaced)

1. You're right, I'm not an engineer at Intel.

2. You're right again, I'm not an engineer at Rambus.

I'm not saying RAMBUS sucks. If you read closely enough, I promote it for the Pentium 4 over SDRAM. I even said that it made sense for Intel to choose RDRAM instead of DDR, because if they could pull it off, they'd have a way to have high bandwidth for the Pentium 4 (which, by its design, it NEEDS), AND they'd have a way to make a quick buck (their relationship with Rambus). It made sense, and I said that.

I said Rambus doesn't make sense for the Itanium because of RDRAM's longer latencies, which the Itanium just isn't designed to deal with.

Its funny how I'm now a Pro AMD enthusiast now that I've written this article. I actually thought I was rather Pro Intel when discussing the Pentium 4, and the economics of the Celeron. I was "anti Intel" with my views towards the Itanium. I didn't say IA-64 sucked. I said the Itanium sucked.

I say this because they were supposed to be left with a "lean mean" chip, yet IT IS STILL having problems yielding at 800mhz and above. They have claimed SPEC scores are irrelavent for the Itanium. Um....SPEC scores are industry standards. People make compilers that are written with SPEC in mind just to show them off. If Intel doesn't want to show Itanium SPEC scores, and to belittle them at the same time, there has to be a reason....

About how DDR is the "holy grail" and how its not the solution, please tell me why RDRAM is?

RDRAM at first had abysmal performance with the i820 and the Pentium III, and even the i840 was slower than a BX 133 with SDRAM. Yet, with the Pentium 4, it has been shown to be a viable technology.

API has shown it to be a viable technology, as they plan on using 8 (yes, eight) rambus channels for one of their chips still in development.

As far as DDR only showing 5% improvement....let me ask you something – how many of the benchmarks you’re looking at are bandwidth intensive? I mean, really bandwidth intensive.

Look at http://www.anandtech.com/showdoc.html?i=1344&p=9 . Look at the bottom picture, and towards the right where the data set is the largest in Linpack (very bandwidth intensive – infact, bandwidth is mostly what it benches). The largest data sets are able to use the cache’s the least, so its main memory that’s being tested. There, at the far right, the difference for the VIA chipset as compared to the DDR 760, is about 70 for the VIA to 100 for the AMD. That’s a 43% increase! That is nothing to laugh about.

The problem is that not everything that people do is bandwidth intensive, and in those cases, the increase is rather modest. Amdahls law: an application can be sped up at most, only by the fraction of the particular part that is being sped up. What that means is, an action or technology can only be as helpful to performance as the fraction of the time of the problem that the action or technology is fixing. i.e., if bandwidth is only an issue 10% of the time, the other 90% of the time increasing bandwidth won’t do much.

“Articles like these makes the PC community look pretty pathetic to outsiders.”

Anything “technical” looks either freaky weird, or pathetic to “outsiders” who don’t stay up to date with what’s going on in whatever industry they are “looking” into, be it computers, or cars.

From your comments, it doesn’t look like you read the article very closely. I actually responded * positively * with respect towards the Pentium 4 and Rambus.


[This message has been edited by Paul (edited 01-10-2001).]

Haven't read through the article completely, but there is a point that you failed to recognize. Intel can't release SPEC scores for the Itanium, because according to SPEC reporting rules the hardware used in the SPEC submissions must be available to the public within 3 months of submitting the results.

Though I am not up to snuff with the rules of SPEC (I have been trying to find out what the exact rules are), I do know that they require availability within a certain time frame. I can only take you at your word about the time frame being 3 months, as I don't know otherwise. The compilers also have to be available within 6 months of posting the score, but Intel hasn't even given estimates for the Itanium.

If Intel had impressive SPEC results (I'm sure SOMEONE has done them, just not announced the results for obvious reasons), they would certainly be touting that they were doing well, even if they couldn't announce them. But they have flat out said that SPEC scores aren't relavent for the Itanium.

Well, I found the SPEC rules, but I don't have time to go over them all. But you do raise a valid point against my article, one which I had not considered. Thank you .

I beg to differ. This is clearly a well-researched piece of work. I would like to see more articles of this calibre, rather than the crap from anandtech, firing squad and, to a lesser extent, thg.

Following two links shows a comparisson between P4 and Athlon and itanium..
http://www.aceshardware.com/Spades/...ost_id=20000322
http://www.netlib.org/atlas/atlas-comm/msg00187.html

In one comparison P4 shows quite a performance... and in other one it is totally opposite picture... can u plz explain it.... also which one is more near to realtime application performance...??